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author    = {J{\"{o}}rg Walter and
             Ralph G{\"{o}}rgen and
             Wolfgang Nebel},
title     = {Predicting Performance and Energy Efficiency for Large-Scale Parallel
             Applications on Highly Heterogeneous Platforms},
booktitle = {19th {GI/ITG/GMM} Workshop Methoden und Beschreibungssprachen zur
             Modellierung und Verifikation von Schaltungen und Systemen, {MBMV}
             2016, Freiburg im Breisgau, Germany, March 1-2, 2016.},
pages     = {116--127},
year      = {2016},
crossref  = {DBLP:conf/mbmv/2016},
url       = {},
doi       = {10.6094/UNIFR/10645},
timestamp = {Wed, 24 Feb 2016 15:07:18 +0100},
biburl    = {},
bibsource = {dblp computer science bibliography,},
abstract  = {Predicting the performance of parallel programs for large-scale parallel platforms is challenging due to the disparity between development system and target platform. This is even worse now that energy efficiency is a universal concern and platforms move towards highly heterogeneous reconfigurable systems containing GPUs, FPGAs, and other unconventional processing elements. In this paper we present a simulative approach that predicts energy usage and performance of parallel software on large heterogeneous platforms. It simulates communication activity in detail while abstracting functional behaviour. This allows developers to quickly compare and optimise application designs, hardware configurations, and mapping alternatives even without a fully working target platform.},
file      = {2016_walter_predicting_large_scale_power_performance.pdf}



  author = {Philipp Ittershagen and and Kim Gr{\"u}ttner and Wolfgang Nebel},
  title = {A Task-Level Monitoring Framework for Multi-Processor Platforms},
  year = {2016},
  month = {5},
  booktitle = {Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems  (SCOPES'2016)},
  doi = {10.1145/2906363.2906373},
  url = {},
  abstract = {In this paper, a monitoring framework for observing properties of tasks running on a multi-processor platform is proposed.  We describe the implementation of the framework on a TLM-based virtual platform containing an ARM Cortex A9 multi-core instruction-set simulator and shared memory modules.  An application model consisting of periodic tasks and communication channels is used to demonstrate the applicability of the monitoring framework. Based on the application model, we describe a method for deriving a monitor implementation at design time that is able to check the execution order and the platform mapping during run-time.  The model is implemented on top of a POSIX-compatible real-time operating system and the monitor is instantiated as a TLM component in the virtual platform.  The monitor implementation is then able to check the execution order and the platform mapping of the application against the specification at run-time. Finally, we discuss the monitoring capability and its contribution to a safety concept for fail-safe systems.},
  file = {2016_ittershagen_monitoring_framework.pdf}


bib/2016.txt · Last modified: 2016-09-30 10:04 by Philipp Ittershagen