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bib:2012

@InProceedings{ Lorenz:2012:RIFSMEP,

title = "From {RTL} {IP} to Functional System--Level Models with Extra--Functional Properties",
booktitle = "CODES+ISSS’12",
author = "Daniel Lorenz and Kim Gr{\"u}ttner and Nicola Bombieri and Valerio Guarnieri and Sara Bocchio",
month = "10",
year = "2012",
location = "Tampere, Finland",
location = "Tampere, Finland",
abstract = "The paper presents a novel abstraction methodology for generating time-- and power--annotated TLM models from synthesizable RTL descriptions. The proposed techniques allow the integration of existing RTL IP components into virtual platforms for early software development and platform design, configuration, and exploration. With the proposed approach, IP models can be natively integrated into SystemC TLM--2.0 platforms and executed 10--1000 times faster compared to state--of--the--art RTL simulators. The abstraction methodology guarantees preservation of the behaviour and timing of the RTL models. Target technology dependent power properties of IP components are represented as power state--machines and integrated into the abstracted TLM models. The experimental results show a relative error less than 10{\%} of the abstracted model's power consumption compared to state--of--the--art RTL power simulators. The evaluation has been performed on RTL IP components with different characteristics and demonstrates the effectiveness of the presented abstraction methodology.",
Project = "COMPLEX ENERSAVE",
File = "Lorenz2012a.pdf"

}

@InProceedings{ Pielawa:2012:IMPRRT,

title = "Integrated Monitoring for Personalized Renal Replacement Therapy",
author = "Lukas Pielawa and Frank Poppen and Maarten Wester and Frank Simonis and Melina Brell and Jaap Joles and Andreas Hein",
organization = "DGBMT",
month = "09",
year = "2012",
booktitle = "BMT 2012",
Project = "NEPHRON+"

}

@InProceedings{ Gruettner:2012:CCMPE,

Author = "Kim Gr{\"u}ttner and Philipp A. Hartmann and Kai Hylla and Sven Rosinger and Wolfgang Nebel and Fernando Herrera and Eugenio Villar and Carlo Brandolese and William Fornaciari and Gianluca Palermo and Chantal Ykman-Couvreur and Davide Quaglia and Francisco Ferrero and Raul Valencia",
Title = "COMPLEX -- COdesign and power Management in Platform--based design space EXploration",
Year = "2012",
Month = "09",
abstract = "The consideration of an embedded devices power consumption and its management is increasingly important nowadays. Currently, it is not easily possible to integrate power information already during the platform exploration phase. In this paper, we discuss the design challenges of todays heterogeneous HW/SW systems regarding power and complexity, both for platform vendors as well as system integrators. As a result, we propose a design flow concept that combines system--level power optimization techniques with platform--based rapid prototyping. Virtual executable prototypes are generated from MARTE/UML and functional C/C++ descriptions, which then allows to study different platforms, mapping alternatives and power management strategies. Our proposed flow combines system--level timing and power estimation techniques available in commercial tools with platformbased rapid prototyping. We propose an efficient code annotation technique for timing and power properties that enables fast host execution as well as adaptive collection of power traces. Combined with a flexible design--space exploration (DSE) approach our flow allows a trade--off between different platforms, mapping alternatives, and optimization techniques, based on domainspecific workload scenarios. The proposed flow is currently under implementation in the COMPLEX FP7 European integrated project.",
Organization = "Euromicro",
booktitle = "15th Euromicro Conference on Digital System Design (DSD)",
Project = "COMPLEX"

}

@InProceedings{ Lorenz:2012:NPSSS,

Author = {Daniel Lorenz and Philipp A. Hartmann and Kim Gr{\"u}ttner and Wolfgang Nebel},
Title = "Non--invasive Power Simulation at System--Level with SystemC",
Year = "2012",
Month = "09",
abstract = "Due to the increasing algorithmic complexity of today's embedded systems, consideration of extra--functional properties becomes more important. Extra--functional properties like timing, power consumption, and temperature need to be validated against given requirements on all abstraction levels. For timing and power consumption at RT-- and gate--level several techniques are available, but there is still a lack of methods and tools for power estimation and analyses at system and higher levels. In this paper we present an approach for non--invasive augmentation of functional SystemC(TM) TLM--2.0 components with power properties. The I/O behaviour of a TLM--2.0 component will be observed by a Protocol State Machine (PrSM) that generates trigger events to stimulate a Power State Machines (PSM). The PSM describes the component's internal power states and transitions and transitions between them. Each component's PSM is connected with a frequency and voltage dependent power model. We present first evaluation results of different IP components and compare our system--level power traces generation with state--of--the--art gate--level power simulations in terms of accuracy and simulation speed.",
booktitle = "International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012",
Project = "COMPLEX ENERSAVE",
File = "Lorenz2012.pdf"

}

@InProceedings{ Gruettner:2012:TPEEESDVP,

Author = {Kim Gr{\"u}ttner and Philipp A. Hartmann and Tiemo Fandrey and Kai Hylla and Domenik Helms and Frank Oppenheimer and Wolfgang Nebel and Achim Rettberg},
Title = "Towards Performance and Energy Efficient Embedded System Design using Virtual Platforms",
Year = "2012",
Month = "06",
booktitle = "The 2012 Electronic System Level Synthesis Conference (ESLsyn)",
Project = "COMPLEX"

}

@InProceedings{ Nebel:2012:UNMS,

Author = {Wolfgang Nebel and Domenik Helms and Kim Gr{\"u}ttner and Frank Oppenheimer},
Title = {{\"U}ber die Notwendigkeit neuer Modellierungskonzepte komplexer eingebetteter Systeme},
Year = "2012",
Month = "05",
abstract = {Eingebettete Systeme waren stets komplex, ihr Entwurf immer aufw{\"a}ndig, risikoreich und kostspielig. Gleichwohl sind und bleiben sie DIE Innovationstreiber. Die Herausforderungen ihres Entwurfs konnten in der Vergangenheit durch gewaltige Fortschritte der Entwurfsverfahren beherrscht werden. Aber keine Industrie wird vergleichbar der Mikroelektronik st{\"a}ndig vor neue Herausforderungen gestellt der Preis der enormen Innovationsleistung: Mit jeder L{\"o}sung eines Entwurfsproblems wird eine Innovationswelle ausgel{\"o}st -- und neue Herausforderungen. EDA--Forschung eine Sisyphusarbeit? Nein, die Ziele werden erreicht, man erklimmt den Berg, aber dahinter liegt ein neuer Gipfel mit neuen wirtschaftlichen Chancen, aber auch neuen Forschungsaufgaben. Eine der derzeitigen Aufgaben liegt darin, Systeme zu entwickeln und zu optimieren, die eine zunehmende Menge von Randbedingungen erf{\"u}llen und Eigenschaften aufweisen m{\"u}ssen. Sie sollen gleichzeitig leistungsf{\"a}hig sein, kosteng{\"u}nstig, energieeffizient, echtzeitf{\"a}hig, robust und zuverl{\"a}ssig. Sie sollen f{\"u}r unterschiedliche Aufgaben optimiert sein, trotzdem flexibel und konform zu Standards. Sie sollen auch im Entwurf kosteng{\"u}nstig sein und in ihren Eigenschaften vorhersehbar. Dies f{\"u}hrt zu heterogenen Systemen mit unterschiedlichen Prozessorkernen, analogen Komponenten, anwendungsspezifischen Coprozessoren und Standardmodulen. Zus{\"a}tzlich erschweren Alterungseffekte neuer Halbleitertechno--logien, enge thermische Grenzen, neue Packaging--Konzepte den Entwurf. Ein verl{\"a}sslicher Entwurf und eine zielorientierte Optimierung solcher komplexer Systeme erfordern eine sehr fr{\"u}hzeitige quantitative Bewertung der Vielzahl der Qualit{\"a}tseigenschaften dieser Systeme. Hierf{\"u}r ist ein Modellierungskonzept bestehend aus abstrakten, verl{\"a}sslichen und interoperablen Modellen heterogener Systemkomponenten notwendig.},
Organization = "edacentrum",
booktitle = "edaWorkshop 2012"
Project = "none"

}

@InProceedings{ Radke:2012:CMSVPSL,

Author = {Stephan Radke and Steffen R{\"u}lke and Marcio F.S. Oliveira and Christoph Kuznik and Wolfgang M{\"u}ller and Wolfgang Ecker and Volkan Esen and Simon Hufnagel and Nico Bannow and Helmut Brazdrum and Peter Janssen and Hoang M. Le and Daniel Gro{\ss}e and Rolf Drechsler and Erhard Fehlauer and Gernot Koch and Andreas Burger and Oliver Bringmann and Wolfgang Rosenstiel and Finn Headicke and Ralph G{\"o}rgen and Jan-Hendrick Oetjens},
Title = "Compilation of Methodologies to Speed up the Verification Process at System Level",
Year = "2012",
Month = "05",
Organization = "edacentrum",
publisher = "VDE-Verlag",
pages = "57--62",
isbn = "978-3-8007-3428-3",
url = "http://publica.fraunhofer.de/dokumente/N-205427.html",
booktitle = "edaWorkshop 12",
Project = "SANITAS"

}

@InProceedings{ Goergen:2012:SBVCHS,

Author = {Ralph G{\"o}rgen and Henning Kleen and Jan-Hendrik Oetjens and Peter Jores and Wolfgang Nebel},
Title = "SystemC Based Verification of Complex Heterogeneous Systems",
Year = "2012",
Month = "04",
abstract = "This paper presents an industrial verification flow for heterogeneous electronic hardware components. The verification process is described with the help of the SystemC AMS model of a current controller, which is part of an automotive anti--lock breaking system. To enable the verification of heterogeneous designs, an existing SystemC based framework is extended to support mixed--signal test--bench modules implemented in SystemC AMS. Additionally, a concept to re--use digital test--bench modules for TLM and RTL verification is shown. ",
Publisher = "Fraunhofer Verlag",
Isbn = "978--3--8396--0398--7",
Booktitle = "Cyber-Physical Systems - Enabling Multi-Nature Systems (CPMNS)",
Organization = "ITG/GI/GMM",
series = "CPMNS Tagungsband",
Project = "SANITAS"

}

@InProceedings{ Goergen:2012:AIHDSM,

title = "Automatic Integration of Hardware Descriptions into System--Level Models",
booktitle = "Design \& Diagnostics of Electronic Ciruits and Systems (DDECS)",
author = {Ralph G{\"o}rgen and Jan-Hendrik Oetjens and Wolfgang Nebel},
organization = "IEEE",
month = "04",
year = "2012",
isbn = "978--1--4244--9754--6",
abstract = "In this paper, we present a flow for integrating hardware descriptions into Simulink simulations. It enables the automatic generation of a Simulink component out of a hardware component model given as RT level VHDL. The approach is based on two steps. The first step transforms the VHDL model to SystemC. In contrast to existing VHDL--to--SystemC transformation tools, the readability and onfigurability of the input model is preserved. In addition, our approach yields a more exact model, as a custom designed VHDL--like data--type system is employed. The second step generates a specific wrapper to allow the use of the component in a Simulink simulation. This transformation strategy will be evaluated with two industrial automotive electronics hardware designs. ",
doi = "10.1109/DDECS.2012.6219034",
series = "Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
Project = "SANITAS"

}

@InProceedings{ Poppen:2012:CCSSMS,

Author = {Frank Poppen and Kim Gr{\"u}ttner},
Title = "Co--Simulation of C--based SoC Simulators and MATLAB Simulink",
Year = "2012",
Month = "03",
abstract = "Simulation of systems under development is a widely used methodology for early design evaluation and performance analysis. Many engineers trust on MATLAB {\&}amp; Simulink as a simulation environment, especially since it offers many domain specific block sets for fast, easy and efficient use. With its ability to generate life source code from the simulation model it becomes a powerful development tool. After code generation it is common practice to proceed to the real world and maybe coupling HW executing the generated SW with simulation (HW in the loop simulation), which can be considered to be a big jump into the cold water. The contribution of this paper is a concept and proof--of--concept implementation of a co--simulation interface between a C--based System on Chip (SoC) model and MATLAB {\&}amp; Simulink. The proposed approach enables the coupling of application domain specific high level simulation with a bit and cycle accurate virtual execution platform of a specific embedded HW/SW platform without interfacing troubles. Our concept was implemented for and applied to the development of an embedded medical device a Wearable Artificial Kidney Device (WAKD).",
Organization = "Operational Research Society",
booktitle = "Simulation Workshop 2012 (SW12)",
Project = "NEPHRON+"

}

@Proceedings{ Leupers:2012:DFWQVVPCSTT,

title = "DATE 2012 Friday Workshop (W2): Quo Vadis, Virtual Platforms? Challenges and Solutions for Today and Tomorrow",
author = {Rainer Leupers and Christian Haubelt and Achim Rettberg and Kim Gr{\"u}ttner},
month = "03",
year = "2012",
abstract = "Nowadays, the deployment of Virtual Platform models is an industry--proven technique in a wide variety of design tasks from pre--silicon software development to performance analysis and exploration. With the increasing complexity, both in terms of the applications and the target platforms (e.g. increasing number of cores, more complex memory hierarchies), the Virtual Platform per se is not an answer to all of todays design challenges. But by adding further abstraction to the models, an increasing need for automated mapping, refinement, and model transformations is needed. Formal, static, and dynamic analysis methods are increasingly dependent on platform details, requiring traceability during all design phases. This workshop aims to bring together developers, researchers, and managers from industry and academia to develop a perspective for the future use of Virtual Platforms by exchanging knowledge about current and future requirements and their possible solutions. The workshop will also provide some space for the provision of state of the art and tangible results and session on tool demos.",
booktitle = "Quo Vadis, Virtual Platforms? Challenges and Solutions for Today and Tomorrow 2012",
Project = "COMPLEX"

}

@InProceedings{ Hartmann:2012:HSTPSMVP,

Author = "Philipp A. Hartmann",
Title = "High--Level Synthesis, TLM Power State Machines, and advanced tracing for Virtual Platforms",
Year = "2012",
Month = "03",
Organization = "DATE'2012, Dresden, Germany",
Url = "http://qvvp12.offis.de/",
booktitle = "Quo Vadis, Virtual Platforms? Challenges and Solutions for Today and Tomorrow (QVVP’12)",
location = "Dresden, Germany",
Project = "none"

}

@InProceedings{ Goergen:2012:SEHPPE,

Author = {Ralph G{\"o}rgen and Florian Voit and Achim Rettberg},
Title = "SystemC--Based Emulation of Hardware Platforms in a Physical Environment",
Year = "2012",
Month = "03",
booktitle = "DATE 2012 Workshop: Quo Vadis, Virtual Platforms",
Project = "none"

}

@InProceedings{ Goergen:2012:SSMPE,

Author = {Ralph G{\"o}rgen and Florian Voit and Achim Rettberg},
Title = "Simulation of SystemC Models in a Physical Environment",
Year = "2012",
Month = "03",
booktitle = "DATE 2012 - University Booth",
Project = "none"

}

@InProceedings{ Lorenz:2012:NSEHSS,

Author = {Daniel Lorenz and Philipp A. Hartmann and Kim Gr{\"u}ttner and Achim Rettberg},
Title = "Nicht--invasive Simulation des Energieverbrauchs von Hardware--Komponenten auf Systemebene mit SystemC",
Year = "2012",
Month = "03",
abstract = {Nicht zuletzt durch die zunehmend wachsende algorithmischen Komplexit{\"a}t heutiger einge-- betteter Systeme gewinnt die Betrachtung nicht--funktionaler Eigenschaften dieser Systeme, wie beispielsweise des Energieverbrauchs, immer st{\"a}rker an Bedeutung. Insbesondere in fr{\"u}-- hen Entwurfsphasen, lange vor der Fertigstellung der finalen Hardwareplattform, werden daher Methoden und Werkzeuge zur Analyse und Absch{\"a}tzung der Leistungsaufnahme dringend be-- n{\"o}tigt. In dieser Arbeit wird ein Simulationsframework basierend auf SystemC vorgestellt, welche die Anreicherung von bereits existierenden, funktionalen TLM--2.0--Modellen um solche nicht-- funktionalen Eigenschaften unterst{\"u}tzt. Um auch eine Betrachtung externer IP--Komponenten zu erm{\"o}glichen, kann der hier pr{\"a}sentierte Ansatz ohne Ver{\"a}nderung der einzelnen Bl{\"o}cke verwendet werden. Der (im Detail) unbekannte interne Zustand (und der daraus resultieren-- de Energieverbrauch) der Komponente wird dabei {\"u}ber eine sogenannte Power State--Machine (PSM) angen{\"a}hert. Die Bestimmung des aktuellen Power States erfolgt {\"u}ber eine separat de-- finierte Protocol State--Machine (PrSM), welche durch die nicht--invasive Beobachtung der In-- teraktion des Hardwareblocks mit seiner Umgebung R{\"u}ckschl{\"u}sse auf das aktuelle Verhalten der Komponente erlaubt. Zur Evaluation der Methodik werden unterschiedliche Komponenten beispielhaft modelliert und analysiert. },
booktitle = "15. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen",
Project = "COMPLEX",
File = "Lorenz2012b.pdf"

}

@InProceedings{ Gruettner:2012:CVPDAPEEESERP,

Author = {Kim Gr{\"u}ttner and Frank Oppenheimer},
Title = "The COMPLEX Virtual Platform Design Approach for Performance and Energy Efficient Embedded Systems: A European Research Perspective",
Year = "2012",
Month = "02",
Organization = "embedded world Conference 2012",
booktitle = "Embedded SW Development on Virtual Platforms Workshop - Ready for Prime Time?",
Project = "COMPLEX"

}

@InProceedings{ Fakih:2012:VLSATAESMP,

Author = {Maher Fakih and Kim Gr{\"u}ttner},
Title = "Virtual--Platform in the Loop Simulation for Accurate Timing Analysis of Embedded Software on Multicore Platforms",
Year = "2012",
Month = "02",
abstract = "The design of embedded systems with real time requirements is a challenging task. On one side, timing predictability is fundamental for guaranteeing safe system operation. On the other side, complex functional behavior needs to be validated at all refinement levels during the design. For multicore platforms this task becomes even more challenging due to the increased complexity in platform parallelism including access arbitration to shared resources such as memories or peripherals, which impact software execution times. This paper describes a co--simulation based validation method for embedded software implemented on multicore hardware platforms. The co--simulation is realized between Simulink and the SystemC--based SoCLib virtual--platform framework. Simulink is used to implement the system environment and functional model of an embedded control system. SoCLib is used to model a multicore execution platform with shared resources. Our design flow enables code generation and deployment from a Simulink model, and execution of this code on a multicore platform. In addition our virtual--platform model allows the observation of software execution and its timing measurement at a cycle accurate level. We demonstrate the applicability of our method through validation of a real--time critical ignition controller system by running our virtual multicore platform in the loop with the Simulink environmental model.",
Organization = "GI ASIM Fachgruppen {\&}quot;Simulation technischer Systeme{\&}quot; (STS) und {\&}quot;Grundlagen und Methoden in Modellbildung und Simulation{\&}quot; (GMMS)",
booktitle = "ASIM STS/GMMS Workshop 2012",
Project = "MotorBrain"

}

@InBook{ Buecker:2012:MCOMERTN,

Author = {Matthias B{\"u}cker and Kim Gr{\"u}ttner and Philipp A. Hartmann and Ingo Stierand},
Title = "Mapping of Concurrent Object--Oriented Models to Extended Real--Time Task Networks",
Year = "2012",
Pages = "37--54",
Month = "01",
Publisher = "Springer",
Isbn = "978--1--4614--1426--1",
Booktitle = "System Specification and Design Languages -- Selected Contributions from FDL 2010",
Url = "http://www.springer.com/978--1--4614--1426--1",
doi = "10.1049/ic.2010.0127",
Project = "COMBEST COMPLEX"

}

@InBook{ Gruettner:2012:RPCHSTPAEF,

title = "Rapid Prototyping of Complex HW/SW Systems using a Timing and Power Aware ESL Framework",
booktitle = "System Specification and Design Languages -- Selected Contributions from FDL 2010",
author = {Kim Gr{\"u}ttner and Kai Hylla and Sven Rosinger and Wolfgang Nebel},
publisher = "Springer",
pages = "157--174",
month = "01",
year = "2012",
isbn = "978--1--4614--1426--1",
doi = "10.1007/978-1-4614-1427-8_10",
url = "http://www.springer.com/978-1-4614-1426-1",
Project = "COMPLEX"

}

@InProceedings{ YkmanCouvreur:2012:RRMDSE,

title = "Run-time Resource Management based on Design Space Exploration",
booktitle = "International Conference on Hardware/Software Codesign and System Synthesis",
series = "CODES+ISSS'2012",
author = "Chantal Ykman-Couvreur and Philipp A. Hartmann and Gianluca Palermo and Fabien Colas-Bigey and Laurent San",
location = "Tampere, Finland",
month = "October",
year = "2012",
numpages = "9",
Project = "none"

}

bib/2012.txt · Last modified: 2014-12-12 13:06 by Daniel Lorenz