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System-Level Design and Synthesis of Embedded HW/SW Systems

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The OFFIS Institute for Information Technology works for almost 10 years in the area of System-Level Design Methodology. In two consecutive research projects, which have been funded by the EU, we have developed a design methodology (OSSS) and a tool (FOSSY) for system level synthesis of SystemC models.

The OSSS methodology defines a seamless design flow for embedded HW/SW systems. It enables the effective use of high-level SystemC and C++ features like classes (object-oriented design paradigm), templates and method based communication for the description of Software and Hardware. Furthermore, it supports the “OSCI SystemC Synthesis Subset” for low-level Hardware description and Hardware IP integration. With FOSSY we provide a tool for the automatic transformation of a system description in OSSS to an implementation.

About 20 person years of intensive research and development along with the evaluation of several world-leading industrial project partners have led to practical experience orientation of the methodology and tools.

home.txt · Last modified: 2009/04/22 13:37 by Philipp A. Hartmann
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